Camgian Networks Develops Clockless Semiconductor Technology
That Supports Advanced System-on-a-Chip Design

STARKVILLE, MS – June 6, 2007 – Following a merger with Theseus Logic, Camgian Networks continues to support the development of NULL Convention Logic™ (NCL™), a proprietary clockless semiconductor design methodology that provides low power operation and is the most RF friendly digital design technique for mixed signal systems-on-a-chip (SoC). These mixed signal chips will be a key enabling component of Camgian's highly integrated wireless microsystems technology.

During the past few years, both industrial and academic groups have demonstrated that clockless design styles can be used to achieve power consumption and unintended emission levels far below traditional design techniques. Notable examples being the use of asynchronous circuits in the Intel Pentium IV, Sun Ultra Sparc IIIi, Philips 8051 microcontroller, and the recently announced ARM996HS asynchronous ARM core.

Theseus Logic Inc. demonstrated the features and benefits of NCL in over 20 application specific integrated circuit designs (ASICs) and has 24 patents issued on this topic. More recently, Theseus has been working with a Boeing led team supported by the Defense Advanced Research Projects Agency (DARPA) to mature the design tools and methodology for clockless design.